| Category | Software Engineering & Development |
|---|---|
| Location | Hillsboro |
| Description | premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Lead Logic Design Engineer to join our Memory & MIPI Controller Group (MCG) team in Hillsboro, OR. In this role, you will be working with some of the brightest inventors and engineers in the world, developing products that make data faster and safer. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work. |
| Responsibilities | Responsibilities Design architecting and trade-off analysis RTL coding and verification Memory Controller + PHY integration and verification Customer delivery and support |
| Requirements | Qualifications Strong System Verilog/Verilog RTL design expertise Questa/Incisive/VCS simulator experience Python/Perl/Tcl scripting experience Significant ASIC and/or FPGA design experience Ability to learn quickly and work independently Solid communication and project management skills 5+ years of logic design experience BSEE Definite Plus: ASIC synthesis, timing constraint, CDC/RDC experience Verification experience Memory (HBM, GDDR, LPDDR, DDR) expertise AMBA AXI or CHI design experience Located in the Hillsboro, Oregon area Training: Provided as needed |
| State | OR |
| ZipCode | 97124 |
| Country | US |